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ExaNoDe project is looking for chiplet solutions stacked on an active silicon interposer

After the workshop on International Cooperation following ISC 2016 in Frankfurt, Germany, we had the opportunity to talk with Paul Carpenter, a senior researcher in the Computer Sciences Department at the Barcelona Supercomputing Center (BSC) about the ExaNoDe project. Paul Carpenter is working in system architectures and programming models. The ExaNoDe project is building a prototype of an HPC machine based on 64-bit ARM processors and 3D integration. The ARM processors are not extended in this project. ExaNoDe is more focused on the system architecture and the 3D integration aspects, as well as the software stack, including the programming model support.

Within the project the approach the team takes, is a chiplet on an active interposer. This means that within the same package you can have multiple silicon dies. This is a way to reduce the cost of specializing for a particular market, especially in comparison with the System-on-Chip (SoC). If you want to make an HPC-specific part or a part that is specific for some subset of HPC you don't need to redesign the entire SoC but you only redesign the parts that are changed, which are much smaller and therefore much lower cost to specialize.

There is a lot of work on software in the project. Hardware, of course, is very visible and there is also a lot of work in the hardware, but at BSC, the main role is related to the programming model supports. The 3D integration isn't the only innovation within the project, there is also an approach for global shared memory with coherence islands. This is something that the scientific application developer doesn't want to manage manually. This needs to be controlled by the runtime system so that the programme is not specific for the system. This is basically most of the BSC work. It is an important contribution to the project.

ExaNoDe has a budget of 8,5 million euro. The three-year project consists of 13 partners across the whole of Europe. It started in October 2015 and will run until October 2018. ExaNoDe has two sister projects that work very closely together and have a common vision. ExaNoDe is focused on the compute node. ExaNeSt is building the rack, the cooling and the interconnects. EcoScale is pushing the approach to also support accelerators and the FPGA fabric.

The first real ExaNoDe results on the actual machine will come quite late in the project. Building a new silicon package takes a lot of time. Within the last 6 months of the project, the team will have the prototype built and it will integrate the whole of the system, all the software and the applications and have solid results. Before then, the team will already have a discrete prototype which will give a functional evaluation but not performance evaluation. The more software orientated partners are working on this and maybe they will have some limited level of scalability results that the team will be able to make public.

More information is available at the ExaNoDe project website.

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